Texas Instruments /MSP432P411Y /DWT /DWT_FUNCTION1

Function settings. Note 1: If the ETM is not fitted, then ETM trigger is not possible. Note 2: Data value is only sampled for accesses that do not fault (MPU or bus fault). The PC is sampled irrespective of any faults. The PC is only sampled for the first address of a burst. Note 3: FUNCTION is overridden for comparators given by DATAVADDR0 and DATAVADDR1 in DWT_FUNCTION1if DATAVMATCH is also set in DWT_FUNCTION1. The comparators given by DATAVADDR0 and DATAVADDR1 can then only perform address comparator matches for comparator 1 data matches. Note 4: If the data matching functionality is not included during implementation it is not possible to set DATAVADDR0, DATAVADDR1, or DATAVMATCH in DWT_FUNCTION1. This means that the data matching functionality is not available in the implementation. Test the availability of data matching by writing and reading the DATAVMATCH bit in DWT_FUNCTION1. If it is not settable then data matching is unavailable. Note 5: PC match is not recommended for watchpoints because it stops after the instruction. It mainly guards and triggers the ETM.

0 (en_0b0000): Disabled

1 (en_0b0001): EMITRANGE = 0, sample and emit PC through ITM. EMITRANGE = 1, emit address offset through ITM

2 (en_0b0010): EMITRANGE = 0, emit data through ITM on read and write. EMITRANGE = 1, emit data and address offset through ITM on read or write.

3 (en_0b0011): EMITRANGE = 0, sample PC and data value through ITM on read or write. EMITRANGE = 1, emit address offset and data value through ITM on read or write.

4 (en_0b0100): Watchpoint on PC match.

5 (en_0b0101): Watchpoint on read.

6 (en_0b0110): Watchpoint on write.

7 (en_0b0111): Watchpoint on read or write.

8 (en_0b1000): ETM trigger on PC match

9 (en_0b1001): ETM trigger on read

10 (en_0b1010): ETM trigger on write

11 (en_0b1011): ETM trigger on read or write

12 (en_0b1100): EMITRANGE = 0, sample data for read transfers. EMITRANGE = 1, sample Daddr [15:0] for read transfers

13 (en_0b1101): EMITRANGE = 0, sample data for write transfers. EMITRANGE = 1, sample Daddr [15:0] for write transfers

14 (en_0b1110): EMITRANGE = 0, sample PC + data for read transfers. EMITRANGE = 1, sample Daddr [15:0] + data for read transfers

15 (en_0b1111): EMITRANGE = 0, sample PC + data for write transfers. EMITRANGE = 1, sample Daddr [15:0] + data for write transfers

Emit range field. Reserved to permit emitting offset when range match occurs. Reset clears the EMITRANGE bit. PC sampling is not supported when EMITRANGE is enabled. EMITRANGE only applies for: FUNCTION = b0001, b0010, b0011, b1100, b1101, b1110, and b1111.

Only available in comparator 0. When set, this comparator compares against the clock cycle counter.

This bit is only available in comparator 1. When DATAVMATCH is set, this comparator performs data value compares. The comparators given by DATAVADDR0 and DATAVADDR1provide the address for the data comparison. If DATAVMATCH is set in DWT_FUNCTION1, the FUNCTION setting for the comparators given by DATAVADDR0 and DATAVADDR1 are overridden and those comparators only provide the address match for the data comparison.

0 (en_0b0): DATAVADDR1 not supported

1 (en_0b1): DATAVADDR1 supported (enabled).

Defines the size of the data in the COMP register that is to be matched:

0 (en_0b00): byte

1 (en_0b01): halfword

2 (en_0b10): word

3 (en_0b11): Unpredictable.

Identity of a linked address comparator for data value matching when DATAVMATCH == 1.

Identity of a second linked address comparator for data value matching when DATAVMATCH == 1 and LNK1ENA == 1.

This bit is set when the comparator matches, and indicates that the operation defined by FUNCTION has occurred since this bit was last read. This bit is cleared on read.